US Section 232 Chip Tariffs and the Malaysia Semiconductor Tariff 2026: What Back-end Packaging Faces Next

In 2026, the baseline tariff picture on Malaysian-origin shipments has been volatile. An Executive Order in April 2025 announced a 24% reciprocal rate on Malaysian goods under an IEEPA “Liberation Day” framework, later reduced to a 10% baseline during a pause. Separately, a July 2026 tariff summary notes that the Supreme Court struck down the 2025 IEEPA tariffs in a 6–3 decision, and that Malaysia’s rate dropped from 24% to 10% Section 122, effective Feb. 24 and scheduled to sunset around July 24, 2026. That same source states that most semiconductors and electronic components enter at 0% MFN duty under the Information Technology Agreement, so the effective burden for the dominant chip category is described as 10% on the Section 122 layer. This shifting baseline matters to back-end packaging because it directly affects landed cost for packaged ICs and other Chapter 85 electronics entering the US.

What Section 232 Targets, and Why “Back-End” Still Cares

The Section 232 semiconductor tariff is different from broad country tariffs. Under Proclamation 11002 issued on Jan. 14, 2026, it imposes a 25% ad valorem duty effective Jan. 15, 2026 on certain advanced computing chips imported into the United States. It is described as “surgically scoped,” covering only chips that meet defined Tensor Processing Performance and DRAM bandwidth thresholds, with examples including the NVIDIA H200 and AMD MI325X. Sources also emphasize broad exemptions for US data centers, startups, R&D operations, and public sector applications, meaning many end uses may carve out of the duty if properly documented. For Malaysia’s back-end industry, the operational impact is often a classification-and-documentation problem: determining whether a packaged chip or a derivative assembly meets the technical thresholds, whether an exemption applies, and how to support an end-use claim that can survive CBP scrutiny.

Trade figures show why Malaysia remains a key reference point even as sourcing shifts. In US semiconductor imports, Malaysia supplied $21.5 billion worth of chips in 2021, the largest single source at that time. By 2025, Malaysia’s figure had fallen to $11.2 billion, a decline of about 48%, while Taiwan grew from $6.0 billion in 2021 to $13.6 billion in 2025 to become the top source. On the export side, Malaysia was also one of the largest markets for US-shipped semiconductors in 2025 at $7.9 billion, alongside Mexico ($13.2 billion), China ($10.7 billion), and Taiwan ($7.8 billion). In the first five months of 2026, US semiconductor imports rose 29% year-over-year to $24.3 billion while exports rose 15% to $28.1 billion, and the trade surplus narrowed to $3.8 billion from $5.6 billion in the same period of 2025, despite Section 232 tariffs coming into effect. Those US-wide numbers set the backdrop for the Malaysia semiconductor tariff 2026 conversation because they signal active trade flows during the new policy regime.

For Malaysia’s back-end packaging and testing ecosystem, the practical takeaway is that “tariff exposure” is no longer a single number. Many chips entering the US may face a 10% baseline layer as described in July 2026, while a narrower set of advanced chips may also trigger the Section 232 25% duty depending on technical thresholds and exemption eligibility. This matters because, as one analysis of semiconductor trade explains, much of the $40 billion of chips the US imports are actually made in the US, packaged abroad, and reimported, and the US lacks packaging capacity. Malaysia hosts packaging facilities for firms such as Intel and Texas Instruments, and Malaysia also hosts major operations for Intel, Infineon, and Texas Instruments that export directly to US buyers. In that context, the most defensible strategy is process-driven: map which product lines could fall under the covered parameters, separate end uses that qualify for carve-outs, and ensure entry documentation aligns with the claimed treatment.